Ausgesuchte Veröffentlichungen

• R. Radtke, A. Jesser. "Rapid Analysis of Thorax Images for the Detection of Viral Infections", 6th International Conference on Graphics and Signal Processing (ICGSP 2022), Chiba, Japan, July 2022, accepted.
• C. Kammerer, M. Gaust, P. Starke, R. Radtke, A. Jesser. "Classification Methods for Motor Vibration in Predictive Maintenance", 2nd International Conference on Machine Learning Techniques and Data Science (MLDS 2021), Zurich, Switzerland, November 2021. DOI: 10.5121/csit.2021.111805 .
• C. Kammerer, M. Gaust, M. Küstner, P. Starke, R. Radtke, A. Jesser. "Motor Classification with Machine Learning Methods for Predictive Maintenance", 17th IFAC Symposium on Information Control Problems in Manufacturing (INCOM 2021), Budapest June 2021. DOI: 10.1016/j.ifacol.2021.08.126 .
• L. Kopp, R. Radtke, A. Jesser. "Analyse von Thorax-Aufnahmen zur Erkennung von Virusinfektionen wie Covid-19", 26. interdisziplinäre Wissenschaftliche Konferenz Mittweida (IWKM 2021), Mittweida, Deutschland, 2021.
• C. Kammerer, M. Küstner, M. Gaust, P. Starke, R. Radtke, A. Jesser. "Machine Learning Algorithms for Classifying Component Defects for Predictive Maintenance", 26. interdisziplinäre Wissenschaftliche Konferenz Mittweida (IWKM 2021), Mittweida, Deutschland, 2021.
• C. Kammerer, M. Küstner, M. Gaust, P. Starke, R. Radtke, A. Jesser. "Classification of Motor Vibration with Machine Learning Methods and Simulating the
  Vibration using Statistical Models", 3rd Computer Science & Software Engineering Student Workshop (CS&SE@SW 2020) Kryvyi Rih, Ukraine, November 2020.
• C. Kammerer, P. Starke, M. Gaust, M. Küstner, R. Radtke, A. Jesser. "Comparison of Predictive Maintenance Methods for Thermal Systems", 24th international Conference of Knowledge-Based and Intelligent Information & Engineering Systems. (KES 2020), Verona, Italy, September 2020, Procedia Computer Science, 176, 166-174, 2020. DOI: 10.1016/j.procs.2020.08.018 .
• P. Starke, M. Gaust, C. Kammerer, M. Küstner, R. Radtke, A. Jesser. "Vergleich von Predictive Maintenance Methoden für Thermosysteme", 17. Konferenz für 'Angewandten Automatisierungstechnik in Lehre und Entwicklung' (AALE 2020), Leipzig, Deutschland, March 2020.
• R. Eschenweck, D. Unger, Ch. Kraft, A. Jesser. "Developing Power Line Communications for Smart Street Lighting", 23. Internationale Wissenschaftliche Konferenz Mittweida (IWKM 2014), Mittweida, Deutschland, November 2014.
• S. Lämmermann, A. Jesser, A. Viehl, J. Ruf, L. Hedrich, T. Kropf, W. Rosenstiel. "Towards Assertion-Based Verification of Heterogeneous System Designs", The Design, Automation and Test Conference in Europe (DATE’10), Dresden, pp. 1171- 1176, March 2010. DOI: 10.1109/DATE.2010.5456985 .
• S. Lämmermann, A. Jesser, M. Rathegeber, J. Ruf, L. Hedrich, T. Kropf, W. Rosenstiel. "Checking Heterogeneous Signal Characteristics Applying Assertion- Based Verification", Formal Verification of Analog Circuits (FAC'09), Grenoble, Frankreich, June 2009.
• S. Lämmermann, A. Jesser, R. Weiss, J. Ruf, T. Kropf, L. Hedrich, W. Rosenstiel. "An Assertion-Based Verification Methodology for SystemC-AMS Designs", The 15thWorkshop on Synthesis and System Integration of Mixed Information Technologies (SASIMI’09), Okinawa, Japan, pp. 434-439, March 2009.
• S. Lämmermann, A. Pacholik, A. Jesser, R. Weiss, J. Ruf, W. Fengler, L. Hedrich, T. Kropf, W. Rosenstiel. "Improving Mixed-Signal Verification by Assertions Based Design", The 16thIFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC’08), Rhodos, Griechenland, pp. 144-147, October 2008.
• A. Jesser, L. Hedrich. "A Symbolic Approach for Mixed-Signal Model Checking", The 13th Asia and South Pacific Design Automation Conference (ASP-DAC’08), Seoul, Korea, pp. 404-409, January 2008. DOI: 10.1109/ASPDAC.2008.4483984 .
• A. Jesser, S. Lämmermann, A. Pacholik, R. Weiss, J. Ruf, W. Fengler, L. Hedrich, T. Kropf, W. Rosenstiel. "Analog Simulation Meets Digital Verification - A Formal Assertion Approach for Mixed-Signal Verification", The 14th Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI’07), Hokkaido, Japan, pp. 507-514, October 2007.
• S. Steinhorst, A. Jesser, L. Hedrich. "Advanced Property Specification for Model Checking of Analog Systems", 9. ITG/GMM-Fachtagung Analog (Analog'06), Dresden, Deutschland, pp. 63-68, September 2006.
• A. Jesser, M. Wedler, L. Hedrich, W. Kunz. "A case study on applying bounded model checking to analog circuit verification", 9. GI/ITG/GMM-Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV'06), Dresden, Deutschland, pp. 106-113, February 2006.
• S. Urquijo, G. Rohmer, J. Garcia-Blanch, A. Jesser. "Wideband Architecture for Future Navigation Systems", The 7th European Navigation Conference (ENC- GNSS’03), Graz, Österreich, pp. 106-113, April 2003.

Journals

A. Jesser, S. Lämmermann, A. Pacholik, R. Weiss, J. Ruf, W. Fengler, L. Hedrich, T. Kropf, W. Rosenstiel. "Advanced Assertion-Based Design for Mixed-Signal Verification", IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Special Section on “VLSI Design and CAD Algorithms, Vol. E91–A, No. 12, pp. 3548-3555, Dezember 2008. DOI: 10.1093/ietfec/e91-a.12.3548 .

Bücher

• A. Jesser. "Mixed-Signal Circuit Verification Using Symbolic Model Checking Techniques", Dissertation, Universität Frankfurt a. M., ISBN 978-3-89963-841-7 [Add to Citavi project by ISBN] , Verlag Dr. Hut, Oktober 2008.
• C. Amelunxen, Ch. Budnik, S. Burmester, M. Grünwald, H. Höschen, A. Jesser, K. Pöhland, N. Sevilmis, C. Carsten. "Kooperatives autonomes Verhalten am Beispiel eines Clusteralgorithmus", Heinz Nixdorf Institut, Schaltungstechnik, Universität Paderborn, HNI-Verlagsschriftenreihe, Band 64, Proceedings of the 1. International Khepera Workshop,  ISBN 3-931-486-63-9, Sep. 2000.

Sonstige

• A. Jesser, L. Hedrich, et.al. "FEST:Funktionale Verifikation von Systemen", Newsletter edacentrum 03/2006, ISSN-Nr.: 1862 2283. pp. 5-12, 2006.

• Clusterforschungsprojekt FEST : Abschlussbericht ; Vorhabenbezeichnung: funktionale Verifikation von Systemen ; Berichtszeitraum: 01.07.2004 - 30.06.2007, January 2007, DOI: 10.2314/GBV:598259406

• A. Jesser. "Design of a One Channel Noise Reduction Method", Diploma Thesis, University of Paderborn, 2002.

• A. Jesser. "Power Consumption Estimation in Massive Parallel VLSI Processor Fields", Student Research Thesis, University of Paderborn Germany, 2002.